Broadcasting data across a bus in which data transmission can be delayed if a snooping device is not ready to receive

ABSTRACT

A system and method of broadcasting data to multiple targets across a system bus, such as the peripheral component interconnect (PCI) bus, that does not normally support broadcast transfers, in which one target responds to the bus transaction and the remaining targets listen in on the bus transaction to receive data from the system bus. The responding target stalls the bus transaction when any of the listening targets communicate to the responding target that they are temporarily unable to accept the data on the bus.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a PCT National Phase of International ApplicationNo. PCT/GB01/05138 filed Nov. 21, 2001.

This invention relates generally to the transfer of data across a buswithin an electronic system, and more specifically to a method ofbroadcasting data to multiple targets on a bus, such as the peripheralcomponent interconnect (PCI) bus, that does not normally supportbroadcast transfers.

Modern electronic systems make use of connecting many components to acentral bus, commonly known as a databus, so that data can beefficiently moved between components such as the processor, memory andperipherals. At their conception, databases were envisaged as being usedto move data between one transaction initiator and one responding targetat a time. Initially, with computerised systems consisting of only oneprocessing unit and few peripheral components, this proved to be anadequate solution to the problem of allowing the processing unit andperipheral components to transfer data and communicate.

With the advent of modern electronic components running at much higherspeeds than when the original specifications for many databuses weredrawn up, and the development of many more types of components able toconnect to these databuses, the efficient use of the limitedtransmission bandwidth along databuses is essential in achieving goodoverall system performance in computerised systems. Examples ofhigh-performance plug-in components which are compatible with the PCIdatabus standard include video capture cards, Double Data Rate (DDR)memory technologies, IEEE 1394 communication cards, cable and XDSLmodems and LAN cards based on optical or Fast Ethernet protocols.Equally compatible are surface mounted components present onmotherboards and daughterboards of computer systems. Many of these typesof PCI databus compatible components require heavy bandwidth usage.

A common limiting factor for overall system performance of computerisedsystems are bottlenecks caused when databus bandwidth is not enough toaccommodate all the data that needs transporting simultaneously. Forexample, when large amounts of information are frequently transferred toand from memory, the memory databus bandwidth can quickly becomesaturated leading to a cap on performance. This problem is exacerbatedin high performance computer systems, particularly within systems thatcontain more than one processing unit wherein a transaction initiatormay be transmitting data to one or more responding targetssimultaneously.

In these situations data broadcasting (i.e. the simultaneous transfer ofdata from a single source location to multiple destinations) is oftenrequired. If the system databuses used in these high-performance systemsdo not support broadcast transfers then the data has to be individuallyand sequentially transferred to each of the required responding targets,unnecessarily consuming bus bandwidth and increasing both the time takenand the number of processor cycles needed to complete the task. Theseare detrimental factors to the performance of the system and need to beminimised.

Unfortunately, many of the standard databuses used within computerisedsystems do not support broadcast data transfers. Some of these databusesdo provide a simple message broadcasting scheme, but this has been foundin practice to be an impractical method for transferring large blocks ofdata. For example, the databus most commonly and widely used incomputerised systems is the PCI bus, and the specification for thisdatabus provides for a ‘Special Cycle’ transaction which allows amessage to be broadcast to all components on the bus, but this messagecan only consist of a single data item, with no associated addressinginformation. An example of when a ‘Special Cycle’ transaction may beused is in sending power management directives to all the components onthe bus. This type of transaction transmits very low bandwidthinformation and does not allow burst transfers, hence it is unsuitablefor transmitting usable data blocks in real-time applications. Also,because no handshaking is performed on this transaction, there is no wayto stall the data transaction if a target is temporarily unable toaccept the data, for example, if the receiving data buffer is full.

The only other way in which the PCI databus specification allows morethan one component to listen in on data not being directly transmittedto that component is via ‘VGA palette snooping’. This is a means ofhaving a passive listener on the PCI bus listen in, or ‘snoop’, on thedata being transmitted across the PCI bus and is used when special VGAvideo display cards and other high-end display-related components, suchas MPEG decoder cards, need to be able to look at the video card's VGApalette to determine what colours are currently in use. This feature isonly rarely used and is also unsuitable for transmitting large blocks ofdata to multiple components at speed as only a restrictive address range(only of interest to display-related components) is passed along. Again,no handshaking is present in “VGA palette snooping” and a furtherdrawback is present in that an assumption is made that the passivelistener is always at least as fast as the intended responding target inbeing able to receive the transmitted data, otherwise the passivelistener may miss some information.

In many cases the length of the circuit path between a transactioninitiator and the intended multiple responding targets are different,perhaps the data having to pass through bridges and other connectorsbefore reaching certain responding targets, and this can cause timingdelays between different responding targets receiving the same broadcastdata. The broadcasting system has to be flexible enough to accommodateany lags in the responding targets receiving data by varying or evenpausing the data transmission.

Examples of prior art that relates to PCI bus broadcasting transactionsare provided by U.S. Pat. Nos. 5,507,002, 5,634,138, 5,983,024 and6,230,225.

U.S. Pat. No. 5,507,002 to AT&T Global Information Solutions Companydescribes a method of allowing sideband signalling to be made availableto standard PCI compliant components, and also describes part of the PCIspecification relating to “Special Cycle” transactions, and describesthe limitations of using this type of transaction.

U.S. Pat. No. 5,634,138 to Emulex Corporation concerns a method of burstbroadcasting data from a transaction initiator to multiple respondingtargets over a PCI bus, but the teaching in this specification is tomodify both the transaction initiator and the responding target whichcan be costly and impractical. This method requires extra PCI bustransactions to be performed to initiate and terminate broadcastoperations, and responding targets cannot respond that they are notready to accept data.

U.S. Pat. No. 5,983,024 to Honeywell, Inc. relates to a method of robustdata broadcasting on a PCI bus and it requires that both the transactioninitiator and the responding targets are hardware-modified in accordancewith the teachings of the specification. The responding targets have noway of signaling to the transaction initiator that they are not ready toaccept data, and this method only works if the snooping targets arecapable of accepting the data transacted across the PCI bus at whateverspeed the transaction initiator and intended responding target arecommunicating at.

U.S. Pat. No. 6,230,225 to Compaq Computer Corp. teaches howbroadcasting can be achieved with components connected to a PCI busthrough the introduction of a separate multicast bus dedicated toinforming components of when to listen in on PCI bus transactions. Thismethod requires changes to the hardware of all components and theintroduction of a separate dedicated multicast bus. In addition, onlythe intended responding target can signal that it is not ready forreceiving data.

From the prior art it is demonstrated that for a databus broadcastingsystem to work effectively there must be provided a way for theresponding target or snooping targets, to be able to at least suspend oreven slow down or force resends on any of the data transactions beingcarried out on the databus. It is also evident that any system whichrequires significant changes to be made to existing hardware in order tobe implemented will not be readily adopted when there is such a largeexisting user base of unmodified components.

It is with a view to solving these problems that there is provided amethod of broadcasting data to multiple targets across a system bus,such as the peripheral component interconnect (PCI) bus, that does notnormally support broadcast transfers, in which one target responds tothe bus transaction and the remaining targets listen in on the bustransaction to receive data from the system bus, the method comprisingthe responding target stalling the bus transaction when any of thelistening targets communicate to the responding target that they aretemporarily unable to accept the data on the bus.

The present invention allows use of the existing handshakingcommunications established between the transaction initiator and theresponding target to signal stall bus commands from any one or more ofthe snooping targets or the responding target itself. As a consequence,the integrity of the data received by every target on the PCI bus is notcompromised through a target not being ready to receive the datatransmitted through the PCI bus. The benefit of using existing standardhardware specifications to provide the conduit for signaling is thatrobust data broadcasting according to the present invention can becarried out cheaply and quickly, as no modifications to the PCI busconnectors or associated and supporting components, except for thetargets themselves, are needed.

Put in another way, what is proposed is a method of broadcasting data tomultiple targets across a data bus, such as the peripheral componentinterconnect (PCI) bus, that does not normally support broadcasttransfers, in which one target responds to the bus transaction andanother target snoops on the bus transaction, the method comprising thesnooping target transmitting a device busy signal to the respondingtarget when it is temporarily unable to snoop on the data carried by thedata bus and the responding target responding to the device busy signalby stalling the data transfer on the data bus.

Preferably, the transmitting step comprises any one of a plurality ofsnooping targets generating and transmitting a device busy signal to theresponding target for stalling the data bus.

In a further preferred feature the method comprises the step of Oringtogether all of the signals from the plurality of snooping targets toprovide a single bus stall trigger signal. This provides a simplelow-cost way of logically combining all of the device busy signals intoa single bus stall trigger signal which only requires a single logicgate.

In order to react to the responding target or any of the snoopingtargets not being able to receive data, the method preferably furthercomprises the responding target generating a temporary device busysignal and using the same to trigger stalling of the data bus.

So that this method may be adopted with minimal changes to the existinghardware and software in use already, it is advantageous that the methodas previously described comprises any of the snooping targetscommunicating with the responding target via an unused control channelof the data bus. This again advantageously minimises cost andcomplication as existing connections between the target and snoopingtargets are used.

Once the responding target and/or snooping targets are able to receivedata again, it is advantageous that the method comprises a respondingstep that stalls the system bus until such time as the device busysignal is negated.

In an alternative aspect, the invention also resides in a data transferapparatus for broadcasting data to multiple targets across a system bus,such as the peripheral component interconnect (PCI) bus, that does notnormally support broadcast transfers, the apparatus comprising aresponding target connected to the system bus for responding to a datatransfer and at least one snooping target connected to the system busfor listening in on data transfers on the system bus, and processingmeans provided at the responding target for receiving device busysignals from the at least one snooping target, the processing meansbeing arranged to stall the system bus in response to receipt of adevice busy signal.

Phrased differently, the invention could also be said to be a method ofbroadcasting data simultaneously from a transaction initiator to aresponding target and to at least one other target across a databus, themethod comprising: snooping on the data being transmitted across thedatabus by the one other target; generating a busy signal if the oneother target is unable to receive the data being transmitted across thedatabus; and the transaction initiator responding to the generation of abusy signal by stalling the transmission of data across the databusuntil the busy signal is removed.

The present invention can also be considered to be a system forbroadcasting data comprising a transaction initiator, a respondingtarget and at least one other target all on the same databus wherein:the transaction initiator is arranged to broadcast data across thedatabus and the at least one other target comprises means for snoopingon the data; each of the at least one other target comprises means forgenerating a busy signal if the target is unable to receive the databeing sent from the traction initiator; and the transaction initiatorcomprises means for responding to the generation of a busy signal bystalling the transmission of data across the databus until the busysignal is cleared.

In a preferred feature, the transaction initiator further comprisesmeans to vary the data transmission rate across the databus down tozero. By being able to vary the speed of the data transmission to atleast one speed between the maximum or normal speed and zero, any targetthat falls behind in processing data received from the data bus may havea chance to catch up without having to totally halt the transmissionprocess and causing further delay.

It is also envisaged that for such a system it is advantageous to allowfor the data receiving rate to be different for each target so thatrobust data broadcasting according to the present invention may beimplemented with systems containing PCI bus compatible targets ofdiffering specifications, allowing for maximum design flexibility.

The present invention is now described with reference to theaccompanying figures wherein:

FIG. 1 is a block and circuit diagram of a communications apparatusembodying the present invention; and

FIG. 2 is a flow diagram showing the steps implied in implementing amethod of broadcasting data using the apparatus of FIG. 1 according tothe embodiment of the present invention.

In FIG. 1 there is illustrated a functional block and circuit diagram ofa communications apparatus, shown generally at 1, for effectingbroadcast of data across a databus. In this embodiment a databuscomplying with the PCI specification is represented at 2, although thissystem is equally applicable to any databus suitable for use incomputerised systems. Data signals are sent along the bus 2 from atransaction initiator 10 addressed to an intended responding target 3,the responding target being in the form of a plug-in PCI board. Alsoconnected to the same bus 2 are other snooping targets 4 and 5, bothalso in the form of further PCI plug-in boards. Two snooping targets areshown in FIG. 1 although the number of snooping targets may be as manyas required. The responding target and each snooping target areconnected to the PCI bus through standard PCI plug-in board connectors6, although this method is equally applicable to components connected tothe PCI bus through traces on a circuit board. For example, surfacemounted components may be connected to the PCI bus in this method whilststill complying with the inventive concept.

Provided with the responding target are two connectors, one forconnecting a DEVICE BUSY line 7 and one for connecting a STALL BUS line8. Each snooping target also possesses a connector for connecting aDEVICE BUSY line 7. Each DEVICE BUSY line 7 feeds from the respondingand snooping targets into a logical OR gate 9, and the output of logicalOR gate 9 feeds into the STALL BUS connector on the responding targetthrough STALL BUS line 8.

Referring now to FIG. 2, a method of using the above-describedcommunications apparatus is now described. When data is to betransmitted across the PCI bus 2, before the main data itself is sent atstep 20, there is first sent addressing data which signals theresponding target 3 to be ready to accept the following main data. Atthe same time, every other snooping target 4, 5 also responds at step 22by getting ready to accept the following data as well. When handshakinghas been established at step 24 between the responding target 3 and thetransaction initiator 10, the main data is then transmitted at step 28and is received at step 30 by the responding target and all the snoopingtargets.

At any time during transmission of the main data should any one or moreof the responding 3 or snooping 4, 5 targets not be able at step 30 toreceive data at the rate at which it is being sent, an output is sent atstep 32 along the DEVICE BUSY line 7 of the responding 3 or snoopingtarget 4, 5 which has the problem, and this causes the STALL BUS line 8state to change at step 34 due to the logical OR gate 9 receiving aninput. On detecting at step 36 the change in the status of the STALL BUSline, the responding target 3 signals at step 38 to the transactioninitiator 10 to pause the data transmission until all of the respondingand snooping target(s) which have difficulties are able to continuereceiving data again. The responding target 3 signals the transactioninitiator 10 through the normal control lines of the PCI bus 2, andbecause of this, there is no need to modify the transaction initiator 10either in terms of hardware or software, nor is there any need to modifythe BIOS settings of the main board upon which the PCI bus 2 issituated. On receipt of the signal from the responding target 3, thetransaction initiator 10 stalls at step 40 the PCI bus 2.

In this embodiment, the STALL BUS signal prompts a pause in the datatransmission, but it is envisaged in alternative embodiments (not shown)that the data transmission may also be re-sent or slowed down accordingto different types of signals sent from the responding target One way inwhich these alternative embodiments may be put into effect is to haveseparate outputs on the responding and snooping targets, similar to theDEVICE BUSY outputs, for indicating that the responding or snoopingtarget requires data to be re-sent or the transmission rate to be sloweddown. This can be achieved using components and techniques that are wellknown to the skilled addressee. The responding target 3 would then passon the required type of signal to the transaction initiator 10, whichwould then act accordingly to re-send or slow down the datatransmission.

In FIG. 1 the STALL BUS line 8 and DEVICE BUSY line 7 are both separatehardware components on the PCI plug-in boards. An alternative embodiment(not shown) uses unused pins (to unused lines of the PCI bus) in the PCIbus connector specification to act as the STALL BUS line and the DEVICEBUSY line, thus minimising the changes needed to implement the presentinvention on existing systems.

The embodiment of FIG. 1 shows one responding target and one STALL BUSline. In a further alternative embodiment (not shown), any or all of thesnooping targets may also act as a responding target. In this case, allof the snooping targets 4 shown in FIG. 1 are provided with their ownSTALL BUS line inputs from the logical OR gate, so that should they inturn be the responding target they will also be able to signal to thetransaction initiator to pause, re-send or slow down the datatransmission.

Of course, in any one data transaction along the PCI databus 2 there isonly one responding target and if the responding target is different tothe previous responding target, the previous responding target maychange to being a snooping target.

In a yet further embodiment (not shown), any one out of the respondingor snooping targets may become the transaction initiator, responding tosignals to pause, re-send or slow the data transmission from the otherresponding or snooping targets. The PCI bus specification also allowsthe same component to act as both the transaction initiator as well as aresponding target at the same time.

It will be understood that various modifications may be made withoutdeparting from the spirit and scope of the invention. For example,although the present invention has been illustrated in the context of aPCI bus, the same concept works with any bus that lacks a dedicatedburst broadcast mode but does permit two-way communication between thetransaction initiator and at least one responding target. Accordingly,it is to be understood that the invention is not to be limited to thespecific illustrated embodiment, but only by the scope of the appendedclaims.

1. A method of broadcasting data to multiple devices across a system busthat does not normally support broadcast transfers, the methodcomprising: establishing handshaking between a first device on thesystem bus and a second device on the system bus; transmitting data overthe system bus from the first device to the second device, in responseto handshaking being established; receiving the data at the seconddevice and at one or more other devices on the system bus; determining,by the one or more other devices, that the one or more other devices areunable to continue receiving the data at the rate at which the data isbeing transmitted; receiving, by the second device, an indication of thedetermination; transmitting a signal over the system bus from the seconddevice to the first device, in response to receiving the indication; andstalling, by the first device, the transmission of the data over thesystem bus in response to the first device receiving the signal, whereinhandshaking remains established between the first device and the seconddevice during the stalling of the transmission.
 2. The method of claim1, wherein the indication is received by the second device from a singlebus stall line.
 3. The method of claim 2, wherein the single bus stallline is on a channel of the data bus not used to transmit the data. 4.The method of claim 3, further comprising: generating, by the one ormore other devices, one or more device busy signals, in response to thedetermination; receiving the one or more device busy signals at alogical OR gate; utilizing the OR gate to generate the indication; andtransmitting the indication from the logical OR gate to the seconddevice over the bus stall line.
 5. The method of claim 4, furthercomprising: generating, by the second device, a device busy signal, ifthe second device is unable to continue receiving the data at the rateat which the data is being transmitted; and transmitting the device busysignal from the second device to the logical OR gate.
 6. The method ofclaim 1, wherein the system bus is a peripheral component interconnect(PCI) bus.
 7. The method of claim 1, further comprising: re-transmittingthe data over the system bus from the first device to the one or moreother devices, in response to the first device receiving the signal. 8.The method of claim 1, further comprising: detecting, by the firstdevice, the removal of the signal; and resuming transmission of the dataover the system bus from the first device to the second device, inresponse to the detection.
 9. A system for broadcasting data to multipledevices across a system bus comprising: a first device that transmitsdata to a second device over a common data line after establishinghandshaking with the second device; one or more other devices that alsoreceive the data from the common data line, wherein the one or moreother devices provide an indication to the second device that the one ormore other devices are unable to continue receiving the data at the rateat which the data is being transmitted; wherein the second devicetransmits a signal to the first device over the common data line, inresponse to receiving the indication; wherein the first device stallsthe transmission of the data, in response to receiving the signal; andwherein handshaking remains established between the first device and thesecond device during the stalling of the transmission.
 10. The system ofclaim 9, further comprising a bus stall line that differs from thecommon data line, and wherein the indication is received by the seconddevice from the bus stall line.
 11. The system of claim 10, furthercomprising: one or more device busy lines that differ from the commondata line and the bus stall line; wherein the one or more other devicesgenerate one or more device busy signals for the one or more device busylines; and wherein the indication is transmitted on the bus stall lineif the one or more device busy signals are present on the one or moredevice busy lines.
 12. The system of claim 11, further comprising: alogical OR gate connected to the one or more device busy lines andoutputs the indication on the bus stall line if the one or more devicebusy signals are present on the one or more device busy lines.
 13. Thesystem of claim 12, wherein the common data line, the one or more devicebusy lines, and the bus stall line are part of a peripheral componentinterconnect (PCI) bus.
 14. The system of claim 9, wherein the firstdevice re-transmits the data over the common data line, in response toreceiving the signal.
 15. The system of claim 9, wherein the firstdevice detects the removal of the signal and resumes transmission of thedata over the system bus from the first device to the second device, inresponse to the detection.
 16. The system of claim 9, wherein the one ormore other devices do not transmit data on the common data line whilehandshaking is established between the first device and the seconddevice.
 17. The system of claim 9, wherein the one or more device busylines and the bus stall line are lines that are unused lines per the PCIbus connector specification.
 18. A system for broadcasting data tomultiple devices across a system bus comprising: a first device thattransmits data to a second device over a common data line afterestablishing handshaking with the second device; one or more otherdevices that also receive the data from the common data line and do nottransmit data on the common data line while handshaking is establishedbetween the first device and the second device; one or more device busylines connected to the one or more other devices that differ from thecommon data line; a logical OR gate connected to the one or more devicebusy lines; and a bus stall line that connects the logical OR gate andthe second device; wherein at least one of the one or more other devicestransmits a device busy signal to the OR gate over at least one of thedevice busy lines, if the at least one device is unable to continuereceiving the data at the rate at which the data is being transmitted;wherein the logical OR gate receives the one or more device busy linesand outputs an indication on the bus stall line if the device busysignal is present on the one or more device busy lines; wherein thesecond device transmits a signal to the first device over the commondata line, in response to receiving the stall signal; wherein the firstdevice stalls the transmission of the data, in response to receiving thesignal; and wherein handshaking remains established between the firstdevice and the second device during the stalling of the transmission.19. The system of claim 18, wherein the one or more other devices do nottransmit data on the common data line while handshaking is establishedbetween the first device and the second device.
 20. The system of claim18, wherein the second device is connected to one of the device busylines, and wherein the second device transmits a device busy signal tothe logical OR gate over the device busy line if the second device isunable to continue receiving the data at the rate at which the data isbeing transmitted.